VLSI Subsystem Design Course | Digital CMOS VLSI | IIIT Bangalore | NPTEL
Course Details
| Exam Registration | 680 |
|---|---|
| Course Status | Ongoing |
| Course Type | Elective |
| Language | English |
| Duration | 12 weeks |
| Categories | Electrical, Electronics and Communications Engineering, VLSI design |
| Credit Points | 3 |
| Level | Undergraduate/Postgraduate |
| Start Date | 19 Jan 2026 |
| End Date | 10 Apr 2026 |
| Enrollment Ends | 02 Feb 2026 |
| Exam Registration Ends | 20 Feb 2026 |
| Exam Date | 18 Apr 2026 IST |
| NCrF Level | 4.5 — 8.0 |
Master the Core of Modern Chip Design: A Deep Dive into VLSI Subsystems
The relentless march of technology, from smartphones to AI accelerators, is powered by increasingly complex and efficient Very-Large-Scale Integration (VLSI) chips. At the heart of these chips lie meticulously designed subsystems—the functional blocks that perform critical operations. If you're an aspiring electronics engineer or a postgraduate student aiming to build a career at the forefront of semiconductor design, understanding these subsystems is non-negotiable.
We are excited to present a detailed overview of the comprehensive course, "Design and Analysis of VLSI Subsystems," expertly crafted and delivered by a distinguished academic and researcher in the field.
Meet Your Instructor: Prof. Madhav Rao of IIIT Bangalore
Learning from an expert with both academic excellence and industry recognition is invaluable. This course is led by Prof. Madhav Rao, an Associate Professor at the International Institute of Information Technology Bangalore (IIIT-B).
Prof. Rao is not just an educator; he is an accomplished researcher recognized through prestigious awards like the SERB Early Career Research Award and the Visvesvaraya Young Faculty Fellowship. His work, supported by grants from IBM (including the IBM Global University Program Academic Award) and government bodies like MEITY, ensures the course content is cutting-edge and industry-relevant. He brings this rich experience into the classroom, teaching crucial subjects like Digital VLSI Design and VLSI Subsystems to IIIT-B's students.
Course Overview: What Will You Learn?
This 12-week course is designed for undergraduate and postgraduate students. It moves beyond basic digital electronics to focus on the design, analysis, and optimization of digital CMOS VLSI subsystems using the holy trinity of design metrics: Delay, Power, and Area (DPA).
The curriculum provides a balanced mix of fundamental theory and advanced, practical topics:
- Foundation: Deep dive into CMOS transistors, inverter characteristics, noise margins, and RC delay models.
- Optimization: Techniques for delay optimization and exploring different combinatorial circuit families.
- Modern Challenges: A significant focus on interconnect-aware design and comprehensive power estimation and management (including static power).
- Critical Components: Design of standard cells like latches and flip-flops, and the vital practice of Static Timing Analysis (STA).
- Advanced Topics: Hands-on analysis of an Adder subsystem and an introduction to the innovative field of Approximate Computing, discussing its design and error metrics for power-efficient datapaths.
Detailed Course Layout (12-Week Structure)
| Week | Topic |
|---|---|
| Week 1 | CMOS Transistors and Current Model |
| Week 2 | CMOS Inverter and Characteristics |
| Week 3 | Noise Margin and Delay of Inverter |
| Week 4 | RC Delay |
| Week 5 | Delay Optimization |
| Week 6 | Combinatorial Circuit Family |
| Week 7 | Stick Diagram & Interconnects |
| Week 8 | Interconnects (Contd.) |
| Week 9 | Power |
| Week 10 | Static Power, and CMOS Latch and Flip-flop Design |
| Week 11 | Static Timing Analysis |
| Week 12 | Adder Subsystem Design, and Approximate Computing |
Who Should Take This Course?
Intended Audience: This course is ideal for students and professionals passionate about Digital VLSI Design and aiming to specialize in semiconductor R&D.
Prerequisites: A solid understanding of Digital Electronics at the undergraduate level is required. To prepare, you can review foundational courses available on NPTEL:
- Digital Circuits and Systems
- Basic Electronics
Industry Relevance & Career Prospects
The skills taught in this course are directly applicable in the core R&D divisions of leading global semiconductor companies. The course enjoys industry support from giants like Samsung, Intel, Broadcom, Qualcomm, and IBM. Mastering VLSI subsystem design opens doors to roles in:
- Digital Design Engineer
- Physical Design Engineer
- CAD Engineer
- ASIC Design Engineer
- Research Scientist in VLSI
Recommended Textbooks for In-Depth Study
To complement the lectures, Prof. Rao recommends two seminal texts in the field:
- 1. CMOS VLSI Design: A Circuits and Systems Perspective by N. Weste and D. Harris (4th Edition, Pearson).
- 2. Digital Integrated Circuits: A Design Perspective by J. M. Rabaey, A. Chandrakasan, and B. Nikolic.
Embark on this 12-week journey to deconstruct and master the building blocks of modern integrated circuits. With expert guidance from Prof. Madhav Rao, a curriculum aligned with industry needs, and a focus on both fundamentals and frontier topics like approximate computing, this course is a significant step toward a successful career in the ever-evolving world of VLSI design.
Enroll Now →